Key takeaways ▼
Score: the written music for an orchestra, with every section’s part laid out on the same page so they play together. In this article, it’s your designed workflows.
Is AI helping you hit your tape-out date, or putting it at risk? How would you know?
Every Director I talk to is being asked to use AI to deliver faster, or better, or more efficiently, sometimes all three. And they’re still on the hook for the date they committed to. The tools are changing mid-program. Some tasks really are faster, but nobody can say yet whether the date is safer or at more risk.
A leader I’ve worked with for years put the real question simply: where do I invest? In this program, or in the tools and flows for the next one?
To invest in the right place, and to know it’s working, your workflows have to be designed, monitored, and improved as fast as your program is changing. Think of it as an orchestra. The score is your designed workflows. The conductor keeps everyone in time: the operating model that monitors and improves the work. This article is about the score. Part 2 is about the conductor.
Designing the work is harder than it sounds, because AI is changing it at three layers at once.
Gene Kim and Steven Spear, in their book “Wiring the Winning Organization,” describe three layers in every organization. In silicon development, layer 1 is the technical work: circuits, RTL, firmware. Layer 2 is the tools: EDA, verification, debug, and their data. Layer 3 is the social circuitry: the hand-offs, reviews, and decisions that move work between people.
The three layers, adapted from Kim and Spear’s Wiring the Winning Organization
AI is showing up in all three, and a change in one lands on the others. For each layer, you need to know where to use AI, how to use it, and what it does to your date. That starts with understanding how the work is designed.
Layer 1: The Technical Work
This is where most of the AI excitement is. At TSMC’s ecosystem forum in September, TSMC claimed its new AI Design Kit boosts digital design productivity three to five times, and analog/RF up to six. Teams are drafting RTL and firmware from specs faster than ever.
It works best on blocks you understand well: node migrations, derivatives of something you’ve already built, and code you can check against a clear spec. The teams getting real value write the spec and the tests first. The AI proposes. The engineer decides. Harden what you’ve proven, and keep flexibility where the design is new.
What it does to your date depends on what happens next. A block that’s done early lands on someone’s desk early. More RTL means more to verify. More firmware means more to integrate. Speed in layer 1 becomes load in layers 2 and 3.
Layer 2: The Tools
Verification is where most teams started, and that makes sense. It eats about half the schedule. The 2026 Wilson Research Group study found 83% of teams using AI in verification, mostly for debug, test generation, and coverage. Only 9% have it integrated across the whole flow. The top barrier wasn’t cost. It was fitting AI into the tools and flows teams already have.
In my last SemiWiki piece, I asked how much of that half is really verification, and how much is the work around it. AI is speeding up the steps. It isn’t touching the waits between them: the regression queue waiting on licenses and compute, the triage meeting, the fix waiting on a designer. Treat regression, triage, debug, fix, and rerun as one flow, and size it for the volume layer 1 is about to send you.
Layer 3: The Social Circuitry
We design every path a signal takes on a chip. We time it, margin it, and test it. Almost nobody designs the path a decision takes between two teams: RTL to verification, hardware to firmware, design to validation.
That’s where the speed from layers 1 and 2 goes to wait. It lands on the same few senior engineers who have to judge whether the output is right. Microsoft’s 2026 Work Trend Index says it plainly: “the more agents execute, the higher the stakes around human evaluation.”
AI can help here too. Some teams are building review agents that carry their standards, security rules, and lessons from past bugs, and check the work in real time instead of weeks later. But that only works if someone designed the hand-off first: what gets passed, what signal says it’s ready, and who decides.
The System of Work
I’ve seen this before. Leaders added engineers to the team that looked like the bottleneck. That team got faster. The work still waited, just somewhere else.
Every engineer knows why. Amdahl’s law: speeding up part of a job can only help as much as the rest of the job allows.
Say AI makes three quarters of your work twice as fast, and the rest doesn’t change. The whole job gets 1.6 times faster, not 2. The part you didn’t touch goes from a quarter of your schedule to 40 percent of it.
And the constraint can sit in any layer. Fix it in one, and it moves to the next.
Writing the Score
Your score is your designed workflows, owned at every level, the way you’d design a chip: blocks, subsystems, the SoC. Most teams don’t have one. Microsoft found that even among the most advanced AI users, only about a quarter have their hand-offs and quality standards documented and repeatable across the organization.
You don’t need a transformation program to start. Pick one workflow that aligns with a bigger problem you are trying to solve, like delivering faster or scaling operations.
- Define the problem and the outcome. Which date are you trying to pull in, and by how much?
- Understand the work. Map the roles, hand-offs, and sequence of activities around the problem, including the tools and the data that moves between them. The map will surface the issues and show which to fix first as the dependencies become clear. Baseline what you plan to improve so you can measure it.
- Redesign the work with AI. Redesign it end to end, within and between all three layers.
That’s how my post-silicon team started when we were three weeks late on a five-week schedule. We mapped the work, found where the time was going, and redesigned it. Validation cycle time came down by half, and we hit the five-week date for the next ten steppings.
Close
Everyone is getting the same AI tools. The teams that keep their commitments through this disruption will be the ones with a score and a conductor.
A score on its own doesn’t play. In Part 2, I’ll get into the conductor: the operating model that monitors the work while it’s happening, gives every workflow an owner, and connects them from the block to the program to the portfolio.
BIO
Joel Jorgensen founded FlowAccel, helping silicon systems engineering leaders deliver on roadmap commitments and scale development organizations. During 25 years at Intel, he spent 15 years in analog design and architecture for non-volatile memory technologies, earning two patents and co-authoring two IEEE ISSCC papers. He also served as an NPI Chair in manufacturing and later led efforts to expand the use of Steven Spear’s High Velocity Edge methodology beyond Intel’s SSD organization, including bringing Spear in to work directly with Intel engineering leadership.
Also Read:
CTO Interview with Dr. Zakir Syed of ClockEdge
Chips&Media targets AI memory bottlenecks with new compression IP
Overcoming the Edge AI Power Wall with Low-Voltage Foundation IP
Share this post via: