Ha Jung-woo, standing vice chairman of the National Artificial Intelligence Strategy Committee, visited Samsung Electronics' (005930) booth at the Semiconductor Exhibition (SEDEX) 2026, focusing on next-generation artificial intelligence memory chips and system-on-chips for edge devices built with the company's foundry technology. The visit reflected interest in how far Samsung Electronics can contribute to the growth of the AI industry not only in memory but also in logic chips and contract chipmaking.
Ha toured the Samsung Electronics booth for about 10 minutes at around 11 a.m. on the 14th at COEX in Seoul's Gangnam district, where SEDEX 2026 is hosted by the Korea Semiconductor Industry Association. Samsung Electronics officials walked him through the technologies and products on display.
After the tour, Ha told reporters that Samsung Electronics is "the global No. 1 company in the semiconductor industry." He added, "Samsung Electronics connected the overall exhibition theme closely to AI, and I was able to see how semiconductors and AI can develop together economically, including the road map ahead."
Physical AI drew particular attention. Physical AI refers to technology applied to devices that operate in real-world physical environments, such as robots and self-driving cars. Ha asked which companies Samsung Electronics supplies with chips for physical AI, reviewing trends in the related industry.
He also showed interest in recent signs of improvement at Samsung Electronics' foundry business. "Samsung's foundry business has struggled, but I have heard a lot of news that its results are improving recently," Ha said. "I asked Samsung Electronics officials about the current state of that business."
An industry official said Ha was also keenly interested in edge AI chips, including Samsung Electronics' automotive SoCs, as well as a model of zHBM, a three-dimensional memory product displayed at the show.
At the exhibition, Samsung Electronics unveiled HBM4E, its seventh-generation high-bandwidth memory, along with a base die for HBM4E built on a 4-nanometer logic process and advanced packaging technologies.