For years, the fastest memory in an AI server has had to sit practically on top of the processor. Marvell Technology says it can now move that memory up to 50 meters away.
The company’s Photonic Fabric Memory Module uses optical links to let high-bandwidth memory, both HBM and DDR, operate at that distance from a GPU or XPU. The usual electrical limit is 1.5 mm.
What Marvell actually built
Copper wires lose signal quality quickly at the speeds AI chips demand, which is why memory has been bolted right next to the processor. Marvell’s module swaps copper for photonics, meaning data travels as light through optical connections.
The module can pool memory across 16 hosts. That pool can include approximately 1 TB of HBM3e alongside 16 to 32 TB of DDR5.
The summary describes disaggregated memory pools that can exceed 32 TB.
The 50-meter figure is the outer bound. Optical links built without retimers can support practical designs aimed at 25 to 30 meters.
Marvell also points to latency claims of under 200 nanoseconds.
Why the memory wall keeps getting taller
AI accelerators keep getting faster at math, but feeding them data has not kept pace, largely because of electrical signal integrity limits.
The bottleneck is especially painful for large-scale AI inference. Bigger models need more memory, and traditional designs tie the amount of memory to the number of chips you buy.
Marvell’s pitch is that memory should scale independently from compute. If you need more memory, you add memory, not another expensive processor you didn’t otherwise want.
Dave Lazovsky, an executive vice president at Marvell, has argued the technology could lift inference throughput by up to 2 to 3 times in certain contexts.
How we got here
Marvell shared details about the technology in August 2026 at industry events including FMS and Hot Interconnects.
The company then went deeper in mid-to-late October 2026. Those discussions included a theCUBE interview and Marvell’s investor day, where executives framed photonic memory as part of the company’s broader push into AI data center infrastructure.
What this means for AI infrastructure
For investors, the research findings frame this as a potential shift in how AI infrastructure gets built, particularly as demand for high-bandwidth memory solutions grows.
The 2 to 3 times throughput figure comes from Marvell itself and applies only in specific scenarios. The gap between a 50-meter demonstration and practical designs targeting 25 to 30 meters shows that real deployments may land well short of the headline distance.
The things worth watching are concrete. Do hyperscalers and AI labs adopt pooled optical memory in production? Do the latency claims of under 200 nanoseconds hold up outside controlled settings?
Disclosure: This article was edited by Diego Almada Lopez. For more information on how we create and review content, see our Editorial Policy.