Open specs could cut AI data center hardware integration from a year to months

Open specs could cut AI data center hardware integration from a year to months

As AI factories scale, hardware interoperability is becoming as important as raw performance. Accelerators, memory and storage now come from many different suppliers, and every mismatch between them slows deployment across the data center.

Pressure is mounting as AI infrastructure bottlenecks shift attention from individual chips to entire systems. Open communities such as the Open Compute Project, or OCP, integrate separately developed technologies, from Peripheral Component Interconnect Express to Compute Express Link, or CXL, into complete systems that many suppliers can build, according to Siamak Tavallaei (pictured), senior principal engineer at Samsung Semiconductor, a unit of Samsung Electronics Co. Ltd.

“There are different companies skilled in different aspects of the problem. And you would like to, as an integrator, as an open industry, would like to take advantage of all of that,” Tavallaei said. “Therefore, interoperability matters a lot.”

Tavallaei spoke with theCUBE Research’s John Furrier at the AI Data Pipeline Forum, during an exclusive broadcast on theCUBE, SiliconANGLE Media’s livestreaming studio. They discussed why open specifications matter for hardware interoperability and how they can shorten the time it takes hyperscalers to adopt new designs. (* Disclosure below.)

Why hardware interoperability depends on open integration

Tavallaei’s work with OCP traces back to his time at Microsoft Corp.’s Azure cloud, where he co-led OCP’s server project. Large cloud operators kept asking suppliers to build the same hardware, but each supplier read the specification differently, so server fleets drifted apart, he explained.

“Software was what Microsoft was doing well, but we wanted hardware to be common so a number of our suppliers could build the same thing,” Tavallaei said.

A finished system handed to OCP as a monolithic contribution may never catch on, while one shaped in the open draws input from many companies, according to Tavallaei. That broader buy-in brings volume and more engineers working on the same problems.

“If you were to work that with the community, different people will interject their own ideas, and at the end, story will be something that a number of different companies would like, and therefore adoption goes up,” Tavallaei said. “When adoption goes up, volume goes up.”

Memory is the next proving ground. Samsung recently demonstrated CXL memory pooling with Advanced Micro Devices Inc. at the OCP summit, and Tavallaei is bringing the CXL specification into OCP’s Composable Memory Systems subproject. The bet is that hardware interoperability will sharply cut the time hyperscalers need to adopt new designs.

“When a specific thing is built for, for example, one hyperscaler, a different hyperscaler trying to reintegrate that takes time, about nine months, 12 months of reintegrating,” Tavallaei said. “Whereas if things are crisply defined in a specification, when something is good and is recognized, integrating that into a new hyperscale data center might take three months or six months instead of a year or year and a half.”

Here’s the complete video interview, part of SiliconANGLE’s and theCUBE’s coverage of the AI Data Pipeline Forum:

(* Disclosure: ScaleFlux Inc. sponsored this segment of theCUBE. Neither ScaleFlux Inc. nor other sponsors have editorial control over content on theCUBE or SiliconANGLE.)

Photo: SiliconANGLE